Please refer to FIG. 1. The chassis switch 10 is a server whose appearance is designed according to a uniform standard, so as to cooperate with a chassis 10 for using. The major design objective is to reduce the space occupied by the server possibly, so as to obtain an advantage of reducing the cost while the server is deposited in a rental machine room. Besides, because the appearance and the design of the chassis switch 10 have the uniform standard, it may have a better cooperativeness and manageability. In general, the width of the chassis switch 10 may be nineteen inches, and the height thereof is in a unit of U, where 1 U=1.75 inch=44.45 cm. The standard servers may have several heights, including 1 U, 2 U, 3 U, 4 U, 5 U and 7 U. The size of the chassis 11 also applies a universal industry standard and it may vary from 22 U to 42 U. A removable sliding trailer may be disposed inside the chassis 11 according to the height of U, so that users may flexibly adjust the height of the chassis based on the height of the server for placing network equipment, such as the server, hub, disk array cabinet and so on, therein. After the server is placed inside the chassis, all I/O lines of the server are pulled out from a back side of the chassis 11, where all interfaces of the chassis switch 10 are located at the back side as well. All I/O lines are deposited in trunkings of the chassis 11. In general, each of the I/O lines is labelled for easy management. The chassis switch 10 is suitable for the person who has the demand for a large quantity of the servers, for example an internet company requiring a centralized management.
Please refer to FIG. 1. Basic elements of a traditional chassis switch 10 at least include a plurality of line cards 12, a backplane 13 and at least one switch card 14, wherein the backplane 13 is installed on the back side of the chassis 11 and has a plurality of connectors 131 disposed thereon and adapted to be plugged with a designated number of the line cards 12 and the switch card 14. The line cards 12 and the switch card 14 are plugged into the connectors 131 through a front side of the chassis 11, respectively. Therefore, the line cards 12 and the switch card 14 are interconnected by the backplane 13 to switch the network signals with each other. As a result, in order to make all line cards 12 inserted on the traditional chassis switch 10 can be operated in a full-speed performance without being blocked, the backplane 13 needs to have enough bandwidth and high-speed transmission ability.
Please refer back to FIG. 1. Generally speaking, in order to reduce the cost and avoid any idle resource, the user usually buys a chassis 11 and a small quantity of line cards 12 when setting up the chassis network switching system in an early stage. Then, as the demand for the network communication is increased, more line cards 12 are gradually added. However, as the network specification is raised gradually, the signal transmission speed of the line cards 12 also becomes faster, such that the demand for the signal transmission accumulated on the backplane 13 is increased as well. The signal transmission speed of the single backplane 13 cannot go with the one of the line cards 12, so that the single backplane 13 may not enable the line cards 12 to operate in the full-speed performance with the non-blocking or low latency. Therefore, a novel chassis switch is developed and its design is to distribute the signals of the above centralized backplane 13, please refer to FIG. 2, to plural groups of backplane signal lines 132. Thus, the mesh connection for 2-stage fat tree proposed by ANSI/TIA-942-A-1 standard is presented. This kind of switch is named as a chassis switch with a distributed backplane design, and includes the following two features:
1. Please refer to FIG. 1 and FIG. 2. Electronic circuit chips (hereinafter referred to as chips) required for the chassis switch include at least an access switch chip 121 and an interconnection switch chip 141. The access switch chip 121 is assembled on each line card 12, and the interconnection switch chip 141 is assembled on the switch card 14.
2. Based on the access switch chip 121, the network signals received or sent by the I/O port of the line card 12 are switched to the ports of the other line card 12 via the interconnection switch chip 141, so as to form a non-blocking signal switch mechanism.
The chassis switch with thirty-two ports of the fat tree structure is taken as an example. Please refer to FIG. 1 and FIG. 3A. The chassis switch is composed of four line cards 12 which are marked as #0, #1, #2 and #3. The access switch chip 121 of each line card 12 includes a transmission circuit and a receiving circuit, and each of the transmission circuit and the receiving circuit has eight internal ports responsible for transmitting and receiving the signals respectively, where eight external ports are also disposed on the transmission circuit and the receiving circuit correspondingly. Each of the internal ports and the external ports is simply called as a port hereinafter. Therefore, one line card 12 includes eight ports and the four line cards 12 include 32 ports in total. Each of the line cards 12 is adapted for providing a mechanism for switching local network signals, and also responsible for the switching function for I/O ports. The interconnection switch chip 141 of the switch card 14 is responsible for the signals switching between the internal ports of the line cards 12. Please refer to FIG. 3B. The thirty-two backplane signal lines 132 on the backplane 13 are responsible for the connection mechanism between the internal ports of the line cards 12, correspondingly. Thus, the internal ports of the line cards 12 may not only provide the local network signal switching function individually, but also provide the signal switching function between the line cards 12, and an example of the signal switching function is illustrated in FIG. 3C.
The user can just plug some line cards 12 into the chassis switch 10 according to an actual demand rather than plugging a full designated number of the line cards 12 into the chassis switch 10. The chassis switch with thirty-two ports of the above fat tree structure is hereby taken as an example for illustration as follows:
1. Please refer to FIG. 4A and FIG. 4B. When the user only plugs one line card #0 into the chassis switch and the others line cards #1, #2 and #3 are not plugged into the chassis switch at the same time, the four interconnection switch chips 141 of the chassis switch are actually only responsible for the signal switching function between the internal ports of the single access switch chip 121 on the single line card #0, which results in unnecessary expense and resource waste for the arrangement of the interconnection switch chips 141.
2. Please refer to FIG. 5A and FIG. 5B. When the user only plugs two line cards #0 and #1 into the chassis switch and the others line cards #2 and #3 are not plugged into the chassis switch at the same time, the four interconnection switch chips 141 of the chassis switch are actually only responsible for the signal switching function between the internal ports of the two access switch chips 121 on the two line cards #0 and #1, which results in the unnecessary expense and the resource waste for the arrangement of the interconnection switch chips 141.
3. Please refer to FIG. 6A and FIG. 6B. When the user only plugs three line cards #0, #1 and #2 into the chassis switch and the other line card #3 is not plugged into the chassis switch at the same time, the four interconnection switch chips 141 of the chassis switch are actually only responsible for the signal switching function of the internal ports of the three access switch chips 121 on the three line cards #0, #1 and #2, which may result in the unnecessary expense and the resource waste for the arrangement of the interconnection switch chips 141.
Please refer back to FIG. 1. According to the above description, when the amount of the line cards 12 designated on the chassis switch 10 is increased, and the user just plugs some line cards 12 into the chassis switch 10 according to an actual demand rather than plugging the full designated number of the line cards into the chassis, it inevitably results in more unnecessary expense and resource waste for such arrangement of the interconnection switch chips 141.
According to the above, how to design and provide an improved chassis switch based on a circuit loop mechanism of the distributed backplane and capable of performing the local network switching function and the switching function between the line cards by the connectors whose amount is equal to that of the interconnection switch chips, for enabling the network traffic on the chassis switch to be operated in a full-speed and non-blocking condition at a lowest construction cost, is thus the primary objective of the present invention.